Pipelining

Question 1 of 13

A 5-stage instruction pipeline has the stages: IF (Instruction Fetch), ID (Instruction Decode), OF (Operand Fetch), EX (Execute), WB (Write Back). The delays are 5, 7, 10, 8, 6 ns respectively. What is the approximate speedup of the pipeline for 100 instructions compared to a non-pipelined implementation? [GATE CS 2004]